DEVELOPMENT OF PC BASED MULTI-CHANNEL PROGRAMMABLE LOGIC ANALYZER
IRAQI JOURNAL OF COMPUTERS, COMMUNICATIONS, CONTROL AND SYSTEMS ENGINEERING,
2007, Volume 7, Issue 2, Pages 43-63
This paper presents the design and practical implementation of a multi-channel PC based logic analyzer. The analyzer has16 input channels with memory depth of 4K snapshots/channel and capture rate of up to 5 MHz. The analyzer parameters such as internal or external trigger source, falling or rising edge capture clock, state or timing measuring mode, number of pre-trigger and post-trigger snapshots, are made to be programmable and could be changed manually. The analyzer prototype consists of hardware part represented by the development of the interface ISA card and the software part that involves the kernel mode driver and the GUI program development. The developed prototype analyzer has been tested under different configuration schemes using 8085 SDK.
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